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2011 microchip technology inc. ds41111e-page 1 k ee l oq ? code hopping encoder features security ? two programmable 32-bit serial numbers ? two programmable 64-bit encoder keys ? two programmable 60-bit seed values ? each transmission is unique ? 67/69-bit transmission code length ? 32-bit hopping code ? crypt keys are read protected operating ? 2.05-5.5v operation ? six button inputs ? 15 functions available ? four selectable baud rates ? selectable minimum code word completion ? battery low signal transmitted to receiver ? nonvolatile synch ronization data ? pwm, vpwm, ppm, and manchester modulation ? button queue information transmitted ? dual encoder functionality other ? on-chip eeprom ? on-chip tuned oscillator (10% over voltage and temperature) ? button inputs have internal pull-down resistors ?led output ? pll control for ask and fsk ? low external component count ? step-up voltage regulator typical applications the HCS370 is ideal for remote keyless entry (rke) applications. these applications include: ? automotive rke systems ? automotive alarm systems ? automotive immobilizers ? gate and garage door openers ? identity tokens ? burglar alarm systems package types HCS370 block diagram general description the HCS370 is a code hopping encoder designed for secure remote keyless entry (rke) and secure remote control systems. the HCS370 utilizes the k ee l oq ? code hopping technology, which incorpo- rates high security, a small package outline, and low cost to make this device a perfect solution for unidirec- tional authentication systems and access control sys- tems. the HCS370 combines a hopping code generated by a nonlinear encryption algorithm, a serial number, and status bits to create a se cure transmission code. the length of the transmission elim inates the threat of code scanning and code grabbing access techniques. 8 14 1 2 3 4 13 12 11 s0 s1 s2 s3 v dd led data vss pdip, soic, HCS370 s4 sleep/s5 shift rfen step v in 5 6 7 10 9 tssop v ss v dd oscillator reset circuit led driver controller power latching and switching button input port 32-bit shift register encoder eeprom data led s3 s2 s 1 s 0 s4 s5 shift rf enable rfen step-up regulator step v in sleep HCS370
HCS370 ds41111e-page 2 2011 microchip technology inc. the crypt key, serial number, and configuration data are stored in an eeprom arra y which is not accessible via any external connection. the eeprom data is pro- grammable but read protected. the data can be veri- fied only after an automatic erase and programming operation. this protects against attempts to gain access to keys or manipulate synchronization values. in addition, the HCS370 supports a dual encoder. this allows two manufacturers to use the same device with- out having to use the same manufacturer?s code in each of the encoders. t he HCS370 provides an easy to use serial interface for programming the necessary keys, system parameters, and configur ation data. 1.0 system overview key terms the following is a list of key terms used throughout this data sheet. for additional information on k ee l oq and code hopping, refer to technical brief (tb003). ? rke - remote keyless entry ? button status - indicates what button input(s) activated the transmission. encompasses the 6 button status bits s5, s4, s3, s2, s1 and s0 (figure 3-2). ? code hopping - a method by which a code, viewed externally to the system, appears to change unpredictably each time it is transmitted. ? code word - a block of data that is repeatedly transmitted upon button activation (figure 3-2). ? transmission - a data stream consisting of repeating code words (figure 4-1). ? crypt key - a unique and secret 64-bit number used to encrypt and decrypt data. in a symmetri- cal block cipher such as the k ee l oq algorithm, the encryption and decryption keys are equal and will therefore be referred to generally as the crypt key. ? encoder - a device that generates and encodes data. ? encryption algorithm - a recipe whereby data is scrambled using a crypt key. the data can only be interpreted by the respective decryption algorithm using the same crypt key. ? decoder - a device that decodes data received from an encoder (i.e., hcs5xx). ? decryption algorithm - a recipe whereby data scrambled by an encryption algorithm can be unscrambled using the same crypt key. ? learn ? learning involves the receiver calculating the transmitter?s appropriate crypt key, decrypting the received hopping code and storing the serial number, synchronization counter value, and crypt key in eeprom. the k ee l oq product family facil- itates several learning strategies to be imple- mented on the decoder. the following are examples of what can be done. - simple learning the receiver uses a fixe d crypt key. the crypt key is common to every component used by the same manufacturer. - normal learning the receiver derives a crypt key from the encoder serial number. every transmitter has a unique crypt key. - secure learning the receiver derives a crypt key from the encoder seed value. every encoder has a unique seed value that is only transmitted by a special button combination. ? manufacturer?s code ? a unique and secret 64- bit number used to deri ve crypt keys. each encoder is programmed with a crypt key that is a function of the manufacturer?s code. each decoder is programmed with the manufacturer code itself. the HCS370 code hopping encoder is designed specif- ically for keyless entry systems. in particular, typical applications include vehicles and home garage door openers. the encoder portion of a keyless entry sys- tem is integrated into a transmitter carried by the user. the transmitter is operated to gain access to a vehicle or restricted area. the hcs3 70 is meant to be a cost- effective yet secure soluti on to such systems requiring very few external components (figure 2-1). most low end keyless entry transmitters are given a fixed identification code that is transmitted every time a button is pushed. the number of unique identification codes in a low end system is usually a relatively small number. these shortcomin gs provide an opportunity for a sophisticated thief to cr eate a device that ?grabs? a transmission and retransmits it later or a device that quickly ?scans? all possible identification codes until the correct one is found. the HCS370, on the other hand, employs the k ee l oq code hopping technology coupled with a transmission length of 67 bits to virtually eliminate the use of code ?grabbing? or code ?scanning?. the high security level of the HCS370 is based on the patented k ee l oq technol- ogy. a block cipher based on a block length of 32 bits and a key length of 64 bits is used. the algorithm obscures the information in such a way that if a single hopping code data bit changes (before encryption), sta- tistically more than 50% of the encrypted data bits will change.
2011 microchip technology inc. ds41111e-page 3 HCS370 as indicated in the block diagram on page one, the HCS370 has a small eeprom array which must be loaded with several parameters before use; most often programmed by the manufacturer at the time of produc- tion. the most impor tant of these are: ? a serial number, typically unique for every encoder ? a crypt key ? an initial synchronization value the crypt key generation typically inputs the transmitter serial number and 64-bit manufacturer?s code into the key generation algorithm (figure 1-1). the manufac- turer?s code is chosen by th e system manufacturer and must be carefully controlled as it is a pivotal part of the overall system security. figure 1-1: creation and storage of crypt key during production the synchronization counter is the basis behind the transmitted code word changing for each transmission; it increments each time a button is pressed. each incre- ment of the synchronization value results in more than 50% of the hopping code bits changing. figure 1-2 shows how the key values in eeprom are used in the encoder. once the encoder detects a button press, it reads the button inputs and updates the syn- chronization counter. the synchronization counter and crypt key are input to the encryption algorithm and the output is 32 bits of encrypt ed information. this data will change with every button press while its value will appear to ?randomly hop around?. hence, this data is referred to as the hopping portion of the code word. the 32-bit hopping code is combined with the button information and serial number to form the code word transmitted to the receiver. the code word format is explained in greater detail in section 4.1. a receiver may use any type of controller as a decoder. typically, it is a microcontroller with compatible firm- ware that allows the decoder to operate in conjunction with an HCS370 based transmitter. a transmitter must first be ?learned? by the receiver before its use is allowed in the system. learning includes calculating the transmitter?s appropriate crypt key, decrypting the received hopping code, storing the serial number, storing the synchronization counter value, and storing crypt key in eeprom. in normal operation, each received message of valid format is evaluated. the serial number is used to deter- mine if it is from a learned transmitter. if the serial num- ber is from a learned transmitter, the message is decrypted and the synchroniza tion counter is verified. finally, the button status is checked to see what opera- tion is requested. figure 1-3 shows the relationship between some of the values stored by the receiver and the values received from the transmitter. for detailed decoder operation, see section 7.0. transmitter manufacturer?s serial number code crypt key key generation algorithm serial number crypt key sync counter . . . HCS370 production programmer eeprom array
HCS370 ds41111e-page 4 2011 microchip technology inc. figure 1-2: building the transmitted code word (encoder) figure 1-3: basic operation of receiver (decoder) note: circled numbers indicate the order of execution. button press information eeprom array 32 bits encrypted data serial number transmitted information crypt key sync counter serial number k ee l oq ? encryption algorithm button press information eeprom array manufacturer code 32 bits of encrypted data serial number received information decrypted synchronization counter verify counter sync counter serial number k ee l oq ? decryption algorithm 1 3 4 check for match 2 perform function indicated by button press 5 crypt key b0 b1
2011 microchip technology inc. ds41111e-page 5 HCS370 2.0 device description as shown in the typical application circuits (figure 2-1), the HCS370 is an easy device to use. it requires only the addition of buttons and rf circuitry for use as the encoder in your security application. a description of each pin is described in table 2-1. refer to figure 2-3 for information on the i/o pins. table 2-1: pin descriptions the HCS370 will normally be in a low power sleep mode. when a button input is taken high, the device will wake-up, start the step-up regulator, and go through the button debounce delay of t db before the button code is latched. in addition, the device will then read the configuration options. depending on the configura- tion options and the button c ode, the device will deter- mine what the data and modulation format will be for the transmission. the transmission will consist of a stream of code words and will be transmitted t pu after the button is pressed for as long as the buttons are held down or until a time-out occurs. the code word format can be either a code hopping format or a seed format. the time-out time can be selected with the time-out select (tsel) configurati on option. this option allows the time-out to be set to 0.8s, 3.2s, 12.8s, or 25.6s. when a time-out occurs, the device will go into sleep mode to protect the battery fr om draining when a button gets stuck. this option must be chosen to meet maxi- mum transmission length regulatory limits which vary by country. figure 2-1: typical circuits note: s0-s5 and shift inputs have pull-down resistors. v in should be tied high if the step-up regulator is not used. name pin number description s0 1 switch input s0 s1 2 switch input s1 s2 3 switch input s2 s3 4 switch input s3 s4 5 switch input s4 s5/sleep 6 switch input s5, or sleep output shift 7 shift input v in 8 step-up regulator input step 9 step-up pulses output rfen 10 rf enable output v ss 11 ground reference data 12 transmission output pin led 13 open drain output for led with pull-up resistor v dd 14 positive supply voltage s2 v dd b0 tx out s2 six button remote with pll control b1 s0 s1 s3 led v dd data v ss s4 s5 shift rfen step v in data shift figure 2-1(a) b2 b3 b4 b5 r led rf pll d ata i n e nable v dd s2 2.05-5.5v tx out s2 two button remote with step-up circuit s0 s1 s3 led v dd data v ss s4 sleep shift rfen step v in data shift 33k 10k figure 2-1(b) 2.2 k 330 h 1n4148 c out 2n3904 6v@1 ma note: using sleep output low instead of grounding the resistor divider reduces battery drain between transmissions v dd tx out tx1 tx2 dual transmitter remote control s2 s0 s1 s3 led v dd data v ss s4 s5 shift rfen step v in data shift figure 2-1(c) r led v dd 22 f 1000 pf
HCS370 ds41111e-page 6 2011 microchip technology inc. if the device is in the transmit process and detects that a new button is pressed, the current code word will be aborted, a new code word will be transmitted and the time-out counter will reset. if all the buttons are released, a minimum number of code words will still be completed. the minimum code words can be set to 1, 2, 4, or 8 using the minimum code words (mtx) con- figuration option. if the time for transmitting the mini- mum code words is longer th an the time-out time, the device will not complete the minimum code words. the HCS370 has an onboard nonvolatile eeprom. this eeprom is used to store user programmable data and the synchronization counter. the data is pro- grammed at the time of production and includes the security related informat ion such as encoder keys, serial numbers, discrimination values, and seed val- ues. all the security related options are read protected. the initial counter value is also programmed at the time of production. from then on the device maintains the counter itself. the HCS370 has built in redundancy for counter protection and can recover from counter cor- ruption. the counter will not increment if the previous write was corrupted by low voltage reset or power failure dur- ing t pll . instead, the counter will revert back to the previous count and the HCS370 will attempt to correct the bad bits. this will continue on every button press until the voltage increases and the counter is success- fully corrected. figure 2-2: i/o circuits figure 2-3: i/o circuits ( continued ) data, rfen n p figure 2-2(d) step outputs v in figure 2-2(e) + - 1.2v v dd s0, s1, s2 inputs s3, s4, shift z in figure 2-3(a) led output led figure 2-3(c) v dd led weak s5/sleep z in v dd s5 p n soen figure 2-3(b) n p n sleep
2011 microchip technology inc. ds41111e-page 7 HCS370 figure 2-4: basic flow diagram of the device operation start sample buttons increment seed time out encrypt no no ye s get config tx? counter tr a n s m i t mtx no buttons seed time read seed stop ye s ye s no ye s no no ye s ye s ye s seed button no new buttons no
HCS370 ds41111e-page 8 2011 microchip technology inc. 3.0 eeprom organization a summary of the HCS370 eeprom organization is shown in the three tables below. the address column shows the starting address of the option, and its length or bit position. options larger than 8 bits are stored with the most significant bi ts at the given address. enough consecutive 8-bit blocks are reserved for the entire option size. options such as seed1, which have a length that is not an exact multiple of 8 bits, is stored right justified in the reserved space. additional smaller options such as sdbt1 may be stored in the same address as the most significant bits. table 3-1: encoder1 options (shift = 0) symbol address 16 :bits description (1) reference section key1 1e: 64 bits encoder key 3.2.2 seed1 14: 60 bits encoder seed value 3.3 sync1 00: 20 bits 00: 18 bits encoder synchronization counter (cntsel=1) encoder synchronization counter (cntsel=0) plus overflow 3.2, 3.2.1 ser1 10: 32 bits encoder serial number 3.2.2 disc1 1c: 10 bits encoder discrimination value 3.2, 3.2.1 msel1 1c: ---- 32-- transmissi on modulation format value 2 format 4.1 00 pwm 01 manchester 10 vpwm 11 ppm hsel1 1c: ---4 ---- header select 4 t e = 0 10 t e = 1 4.1 xser1 1c: --5- ---- extended serial number 28 bits = 0 32 bits = 1 3.2 quen1 1c: -6-- ---- queue counter enable disable = 0 enable = 1 5.6 sten1 1c: 7--- ---- start/stop pulse enable disable = 0 enable = 1 4.1 ledbl1 3f: -6-- ---- low voltage led blink never = 0 once = 1 5.3 ledos1 3f: 7--- ---- led on time select (1) 50 ms = 0 100 ms = 1 5.3 sdlm1 3c: ---- ---0 limited seed disable = 0 enable = 1 3.3 sdmd1 3c: ---- --1- seed mode user = 0 production = 1 3.3 sdbt1 14: 7654 ---- seed button code 3.3 sdtm1 3c: ---- 32-- time be fore seed code word (1) value 2 time (s) 3.3 00 0.0 01 0.8 10 1.6 11 3.2 bsel1 3c: --54 ---- transmission baud rate select (1) value 2 t e ( s) 4.1 00 100 01 200 10 400 11 800 gsel1 3c: 76-- ---- guard time select (1) value 2 time (ms) 4.1, 5.2 00 2 t e 01 6.4 10 51.2 11 102.4 note 1: all timing values vary 10%.
2011 microchip technology inc. ds41111e-page 9 HCS370 table 3-2: encoder2 options (shift = 1) symbol address 16 :bits description (1) reference section key2 34: 64 bits encoder key 3.2.1 seed2 2a: 60 bits encoder seed value 3.3 sync2 08: 20 bits 08: 18 bits encoder synchronization counter (cntsel=1) encoder synchronization counter (cntsel=0) plus overflow 3.2, 3.2.1 ser2 26: 32 bits encoder serial number 3.2, 3.2.2 disc2 32: 10 bits encoder discrimination value 3.2, 3.2.1 msel2 32: ---- 32-- transmission modulation format value 2 format 4.1 00 pwm 01 manchester 10 vpwm 11 ppm hsel2 32: ---4 ---- header select 4 t e = 0 10 t e = 1 4.1 xser2 32: --5- ---- extended serial number 28 bits = 0 32 bits = 1 3.2 quen2 32: -6-- ---- queue counter enable disable = 0 enable = 1 5.6 sten2 32: 7--- ---- start/stop puls e enable disable = 0 enable = 1 4.1 ledbl2 3d: -6-- ---- low voltage led blink never = 0 once = 1 5.3 ledos2 3d: 7--- ---- led on time select (1) 50 ms = 0 100 ms = 1 5.3 sdlm2 3e: ---- ---0 limited seed disable = 0 enable = 1 3.3 sdmd2 3e: ---- --1- seed mode us er = 0 production = 1 3.3 sdbt2 2a: 7654 ---- seed button code 3.3 sdtm2 3e: ---- 32-- time before seed code word (1) value 2 time (s) 3.3 00 0.0 01 0.8 10 1.6 11 3.2 bsel2 3e: --54 ---- transmission baud rate select (1) value 2 t e ( s) 4.1 00 100 01 200 10 400 11 800 gsel2 3e: 76-- ---- guard time select (1) value 2 time (ms) 4.1, 5.2 00 2 t e 01 6.4 10 51.2 11 102.4 note 1: all timing values vary 10%.
HCS370 ds41111e-page 10 2011 microchip technology inc. table 3-3: device options 3.1 dual encoder operation the HCS370 contains two transmitter configurations with separate serial number s, encoder keys, discrimi- nation values, syncronization counters, and seed val- ues. the code word is calculated using one of two possible encoder configurations. most options for code word and modulation formats can be different from encoder 1 and encoder 2. however, led and rf transmitter options have to be the same. the shift input pin is used to select between the encoder config- urations. a low on the shift pin will select encoder 1 and a high will select encoder 2. symbol address 16 :bits description (1) reference section wake 3f: ---- --10 wake-up (1) value 2 value 4.1 00 no wake-up 01 75 ms 50% 10 50 ms 33.3% 11 100 ms 16.7% cntsel 3f: ---- -2-- counter select 16 bits = 0 20 bits = 1 3.2.1 vlowl 3f: ---- 3--- low voltage latch enable disable = 0 enable = 1 3.2.3.1 vlowsel 3f: ---4 ---- low voltage trip point select (2) 2.2 v = 0 3.2v = 1 3.2.3.1 pllsel 3f: --5- ---- pll interface select ask = 0 fsk = 1 5.2 mtx 3d: ---- --10 minimum code words value 2 value 2.0 00 1 01 2 10 4 11 8 soen 3d: ---- 3--- sleep ou tput enable disable = 0 enable = 1 5.4 wait 3d: ---- -2-- wait for step-up regu lator disable = 0 enable = 1 5.2, 5.4 tsel 3d: --54 ---- time-out select (1) value 2 time(s) 2.0 00 0.8 01 3.2 10 12.8 11 25.6 note 1: all timing values vary 10%. 2: voltage thresholds are 150 mv.
2011 microchip technology inc. ds41111e-page 11 HCS370 3.2 code word format a k ee l oq code word consists of 32 bits of hopping code data, 32 bits of fixed code data, and between 3 to 5 bits of status information. various code word formats are shown in figure 3-1 and figure 3-2. 3.2.1 hopping code portion the hopping code portion is calculated by encrypting the counter, discrimination value, and function code with the encoder key (key). the hopping code is cal- culated when a button press is debounced and remains unchanged until the next button press. the synchronization counter can be either a 16- or 20- bit value. the configuration option counter select (cntsel) will determine this. the counter select option must be the same for both encoder 1 and encoder 2. if the 16-bit counter is select ed, the discrimination value is 10 bits long and there ar e 2 counter overflow bits (ovr0, ovr1). set both bits in production and ovr0 will be cleared on the first counter overflow and ovr1 on the second. clearing ovr0 with ovr1 set will only detect the first overflow. clearing both ovr bits will effectively give 12 constant bits for discrimination. if the counter is 20 bits, the discrimination value is 8 bits long and there are no overflow bits. the rest of the 32 bits are made up of the function code also known as the button inputs. the discrimination value can be programmed with any value to serve as a post decryption check on the decoder end. in a typical system, this will be pro- grammed with the 8 or 10 leas t significant bits of the serial number. this will be stored by the receiver sys- tem after a transmitter has been learned. the discrimi- nation bits are part of the in formation that is to form the encrypted portion of the transmission. 3.2.2 fixed code portion the 32 bits of fixed code consist of 28 bits of the serial number (ser) and a copy of the 4-bit function code. this can be changed to contain the whole 32-bit serial number by setting the extended serial number (xser) configuration option to a 1. if more than one button is pressed, the function codes are logically or?ed together. the function code is repeated in the encrypted and unencrypted data of a transmission. table 3-4: function codes 3.2.3 status information the status bits will always contain the output of the low voltage (v low ) detector and cyclic redundancy check (crc). if queue (quen) is enabled, button queue information will be included in the code words. figure 3-1: code word data format (16-bit counter) button function code 2 s0 xx1x 2 s1 x1xx 2 s2 1xxx 2 s3 xxx1 2 s4 111x 2 s5 11x1 2 fixed code portion (32 bits) crc 2 bits v low 1-bit serial number (28 bits) c1 c0 s2 s1 s0 s3 but 4 bits counter overflow 2 bits disc 10 bits synchronization 16 bits counter 15 0 s1 s2 s0 s3 ovr1 ovr0 transmission direction lsb first hopping code portion (32 bits) with xser=0, 16-bit counter, quen=0 status information (3 bits) but 4 bits fixed code portion (32 bits) que 2 bits crc 2 bits v low 1-bit serial number (32 bits) q1 q0 c1 c0 but 4 bits counter overflow 2 bits disc 10 bits synchronization 16 bits counter 15 0 s2 s1 s0 s3 ovr1 ovr0 hopping code portion (32 bits) with xser=1, 16-bit counter, quen=1 status information (5 bits)
HCS370 ds41111e-page 12 2011 microchip technology inc. figure 3-2: code word data format (20-bit counter) 3.2.3.1 low voltage detector status (v low ) a low battery voltage detector onboard the HCS370 can indicate when the operating voltage drops below a predetermined value. there are two options available depending on the low voltage trip point select (vlowsel) configuration opt ion. the two options pro- vided are: ? a 2.2v nominal level for 3v operation ? a 3.2v nominal level for 5v operation the output of the low voltage detector is checked on the first preamble pulse of each code word with the led momentarily turned off. the v low bit is transmit- ted in each code word so the decoder can give an indi- cation to the user that the transmitter battery is low. operation of the led changes as well to further indi- cate that the battery is low and needs replacing. the output of the low voltage detector can also be latched once it has dropped below the selected value. the low voltage latch (vlowl) configuration option enables this option. if this option is enabled, the detec- tor level is raised to 3v or 5v once a low battery voltage has been detected, lik e a schmitt trigger. this will effectively hold the v low bit high until the bat- tery is replaced. if the low voltage latch is enabled, then the low t e after the first preamble pulse can stretch by 4 ms one time as the latch changes state. transmission direction lsb first fixed code portion (32 bits) que 2 bits crc 2 bits v low 1-bit serial number (28 bits) q1 q0 c1 c0 s2 s1 s0 s3 but 4 bits disc 8 bits synchronization 20 bits counter 19 0 s2 s1 s0 s3 hopping code portion (32 bits) with xser=0, 20-bit counter, quen=1 status information (5 bits) but 4 bits fixed code portion (32 bits) crc 2 bits v low 1-bit serial number (32 bits) c1 c0 but 4 bits disc 8 bits synchronization 20 bits counter 19 0 s2 s1 s0 s3 hopping code portion (32 bits) with xser=1, 20-bit counter, quen=0 status information (3 bits)
2011 microchip technology inc. ds41111e-page 13 HCS370 3.3 seed code word data format a seed transmission transmits a code word that con- sists of 60 bits of fixed data that is stored in the eeprom. this can be used for secure learning of encoders or whenever a fixed code transmission is required. the seed code word is identified by the func- tion bits = 1111 2 . the seed code word also contains the status information (v low , crc, and queue). the seed code word format is shown in figure 3-3. the function code for seed code words is always 1111 2 . seed code words for encoder 1 and encoder 2 can be configured as follows: ? enabled with the seed button code (sdbt) con- figuration option, or disabled if sdbt = 0000 2 . ? if the limited seed (sdlm) configuration option is set, seed transmissions will be disabled when the synchronization counter is bigger than 127. seed transmissions remain disabled even if the 16/20- bit counter rolls over to 0. ? the delay before the seed transmission is sent can be set to 0.0s, 0.8s , 1.6s and 3.2s with the seed time (sdtm) conf iguration option. when sdtm is set to a value other than 0.0s, the HCS370 will transmit a code hopping transmis- sion until the selected time expires. after the selected time expires, the seed code words are transmitted. this is useful for the decoder to learn the serial number and the seed from a single but- ton press. ? the button code for transmitting a seed code word can be selected with the seed button (sdbt) configuration option. sdbt bits 0 to 3 cor- respond to button inputs s0 to s3. set the bits high for the button combination that should trigger a seed transmission (i.e., if sdbt = 1010 2 then, s3+s1 will trigger a seed transmission). ? the seed transmissions before the counter incre- ments past 128 can be modified with the seed mode (sdmd) configurati on option. setting this bit for production mode will cause the selected seed button combination to first transmit a normal hopping code word for the selected minimum code words (mtx) and then at least mtx seed code words until all buttons are released. this mode is disabled after the counter reaches 128 even if the 16/20-bit co unter rolls over to 0. ? the limit of 127 for sdlm or sdmd can be reduced by using an initial counter value >0. figure 3-3: seed code word format note: the synchronization counter only incre- ments on code hopping transmissions. the counter will not advance on a seed transmission unless seed delay or pro- duction mode options are on. transmission direction lsb first open portion (not encrypted) que (2 bits) crc (2 bits) v low (1-bit) seed with quen = 1 function (4 bits) (9 bits) seed code (60 bits) q1 q0 c1 c0 111 1
HCS370 ds41111e-page 14 2011 microchip technology inc. 4.0 transmitted word 4.1 transmission modulation format the HCS370 transmission is made up of several code words. each code word contains a preamble, header, and data. a code word is separated from another code word by guard time. the guard time select (gsel) configuration option can be set to 0 ms, 6.4 ms, 51.2 ms, or 102.4 ms. all other timing specificat ions for the modulation for- mats are based on a basic timing element (t e ). this timing element can be set to 100 s, 200 s, 400 s or 800 s with the baud rate sele ct (bsel) configuration option. the header time can be set to 4t e or 10t e with the header select (hsel) co nfiguration option. these options can all be set individually for encoder 1 and encoder 2. there are four different modulation formats available, the modulation select (msel) configuration option is used to select between: ? pulse width modulation (pwm) ? manchester (man) ? variable pulse width modulation (vpwm) ? pulse position modulation (ppm) figure 4-1: pulse width modulation (pwm) figure 4-2: manchester (man) logic "1" guard time encrypted portion fixed code portion logic "0" 4-10 header t e t e t e xt e 1 16 t bp 31xt e 50% preamble guard header encrypted portion fixed code portion start bit stop bit time bit 0 bit 1 bit 2 logic "0" logic "1" t e t e t bp 31xt e 50% preamble 1 216 4xt e
2011 microchip technology inc. ds41111e-page 15 HCS370 figure 4-3: variable pulse width modulation (vpwm) figure 4-4: pulse position modulation (ppm) in addition to the modulation format, guard time, and baud rate, the following options are also available to change the transmission format: ? if the start/stop pulse enable (sten) config- uration option is enabled, the HCS370 will place a leading and trailing ?1? on each code word. this is necessary for modulation formats such as man- chester and ppm to interpret the first and last data bit. ? a wake-up sequence can be transmitted before the transmission starts. the wake-up sequence is configured with the wake -up (wake) configura- tion option and can be disabled or set to 50 ms, 75 ms, or 100 ms of pulses as indicated in figure 4-5. ? the wake option is the same for both encoder 1 and encoder 2. figure 4-5: wake-up enable vpwm bit encoding: t bp on transition low to high t bp logic ?0? t bp logic ?1? t e on transition high to low 2 x t e t e t bp t e guard time 10xt e header encrypted portion fixed code portion 2 x t e 31xt e 50% preamble 1 216 t e t e logic ?0? logic ?1? logic "1" logic "0" t e t e t e guard time fixed code portion encrypted portion t bp t bp 31xt e 50% preamble start bit stop bit 10xt e header 1 216 3 x te wake-up = 75 ms wake-up = 50 ms wake-up = 100 ms wake-up guard time = 6.4 ms, 51.2 ms, or 102.4 ms code code t e t e t e 2t e t e 5t e t g t g
HCS370 ds41111e-page 16 2011 microchip technology inc. 5.0 special features 5.1 internal rc oscillator the HCS370 has an onboard rc oscillator that con- trols all the logic output timing characteristics. the oscillator frequency varies over temperature and volt- age variances, but stays within 10% of the tuned value. all the timing values specified in this document are subject to this oscillator variation. 5.2 rf enable and pll interface the rfen pin will be driven high whenever data is transmitted through the data pin. the rfen and data outputs also interface with rf pll?s. the pll interface select (pllsel) configura- tion option selects between ask and fsk interfaces. figure 5-1 shows the startup sequence for both ask and fsk interface options. the rfen signal will go low at the end of the last code word, including the guard time (t g ). the power-up time (t pu ) is the debounce time plus the step-up regulat or ramp up delay if the wait for step-up regulator (wait) configuration option is a ?1?. the pll step-up time (t pll ) is also used to update the eeprom counter. figure 5-1: ask/fsk interface 5.3 led output the led pin will be driven low while the HCS370 is transmitting data. the led on time (t ledon ) can be selected between 50 ms and 100 ms with the led on time select (ledos) configuration option. the led off time (t ledoff ) is fixed at 500 ms. when the v dd voltage drops below the selected v low trip point, the led will not blink unless the led blink (ledbl) option is set. if ledbl is set and v dd is low, then the led will only flash once. waveforms of the led behavior are shown in figure 5-2. for circuits with v dd greater than 3 volts, be sure to limit the led circuit with a series resistor. the led out- put can safely sink up to 25 ma but adding an external resistor will conserve battery power. this is an open drain output but it does have a weak pull-up capable of driving a cmos input. s0 ask rfen ask data fsk rfen fsk data t pu t pll t e code word code word code word code word v bat v reg step t g wait 2 seconds for next button if quen=1 sleep
2011 microchip technology inc. ds41111e-page 17 HCS370 figure 5-2: led operation 5.4 step-up voltage regulator to create your own step-up regulator circuit, first decide on an output voltage. second, set the v in resistor divider to drop it down to 1.2 volts. keep the sum of the two resistors around 100 k . third, put your maximum load on the output and in crease the inductance until c out charges from 0 volts to your output voltage in about 30 ms from the minimum input voltage. finally, test over your temperature and input voltage ranges. the wait option will delay rf transmissions until c out is charged. this permits a trade off in slower but- ton response times to save money on cheaper induc- tors. this can also optimize performance for good batteries and let response times drift for weak batteries. also, this option will indicate failure to reach regulation voltage after 250 ms by not transmitting and not flash- ing the led. if wait is disabled, the step-up regulator still operates and transmissions will always start 30 ms after a button press. the sleep output enable (soen) option can be enabled if s5 is not used. this reconfigures s5 to be an output high when the HCS370 is sleeping. s5 will be an output low when a button press wakes it up. one way to use this option is to save power on the step-up reg- ulator. the problem is that the v in resistor divider makes a dc path through the inductor and diode to dis- charge the battery. by tying the bottom of the divider to sleep as shown in figure 2-1, the path is broken between transmissions. 5.5 cyclic redundancy check (crc) the crc bits are calculated on the 65 previously trans- mitted bits. these bits cont ain the 32-bit hopping code, 32-bit fixed code, and v low bit. the decoder can use the crc bits to check the data integrity before process- ing starts. the crc can detect all single bit errors and 66% of double bit errors. the crc is computed as fol- lows: equation 5-1: crc calculation and with and di n the nth transmission bit 0 <= n <= 64 5.6 button queue information (queue) the queuing or repeated pressing of the same buttons can be handled in two ways on the HCS370. this is controlled with the queue counter enable (quen) configuration option. this option can be different for encoder 1 and encoder 2. when the quen option is disabled, the device will reg- ister up to two sequential button presses. in this case, the device will complete the minimum code words selected with the mtx option before the second code word is calculated and transmitted. the code word will be 67 bits in this case, with no additional queue bits transmitted. if the quen option is enabled, the queue bits are added to the standard code word. the queue bits are a 2-bit counter that does not wrap. the counter value starts at 00 2 and is incremented if a button is pushed within 2 seconds from the st art of the previous button press. the current code word is terminated when a but- ton is queued. this allows additional functionality for double or triple button presses. figure 5-3: code word completion with quen settings 6.0 programming specifications refer to the ?HCS370 programming specifications? document (ds41157) in microchip literature. sn led led v dd > v low v dd < v low t ledon t ledoff ledbl=1 led v dd < v low ledbl=0 crc 1 [] n1 + crc 0 [] n di n = crc 0 [] n1 + crc 0 [] n di n () crc 1 [] n = crc 1 0 , [] 0 0 = sn quen = disabled quen = enabled data wake-up code2 code2 mtx = 01 2 , wake > 00 2 code1 code1 wake-up data wake-up code1 wake-up 00 code2 01 code2 01
HCS370 ds41111e-page 18 2011 microchip technology inc. 7.0 integrating the HCS370 into a system use of the HCS370 in a syst em requires a compatible decoder. this decoder is typi cally a microcontroller with compatible firmware. microchip will provide (via a license agreement) firmware routines that accept transmissions from the HCS370 and decrypt the hopping code portion of the data stream. these routines provide system designers the means to develop their own decoding system. 7.1 learning a transmitter to a receiver a transmitter must first be 'learned' by a decoder before its use is allowed in the system. several learning strat- egies are possible. figure 7-1 details a typical learn sequence. the decoder mu st minimally store each learned transmitter's serial number and current syn- chronization counter value in eeprom. additionally, the decoder typically stores each transmitter's unique crypt key. the maximum number of learned transmit- ters will therefore be relative to the available eeprom. a transmitter's serial number is transmitted in the 32-bit fixed code, but the synchroni zation counter only exists in the code word's encrypted portion. the decoder obtains the counter value by decrypting using the same key used to encrypt the information. the k ee l oq algo- rithm is a symmetrical block cipher so the encryption and decryption keys are identical and referred to gen- erally as the crypt key. the encoder receives its crypt key during manufacturing. the decoder typically calcu- lates the crypt key by running the encoder serial num- ber or seed through the key generation routine. figure 7-1 summarizes a typi cal learn sequence. the decoder receives and authenticates a first transmis- sion; first button press. authentication involves gener- ating the appropriate crypt key, decrypting, validating the correct key usage via the discrimination bits, and buffering the counter value. a second transmission is received and authenticated. a final check verifies the counter values were seque ntial; consecutive button presses. if the learn sequence is successfully com- pleted, the decoder stores the learned transmitter's serial number, current synchronization counter value, and appropriate crypt key. from now on, the crypt key will be retrieved from eeprom during normal opera- tion instead of recalculating it for each transmission received. certain learning strategies have been patented by 3rd parties and care must be taken not to infringe. figure 7-1: typical learn sequence enter learn mode wait for reception of a valid code generate key from serial number use generated key to decrypt compare discrimination value with fixed value equal wait for reception of second valid code compare discrimination value with fixed value use generated key to decrypt equal counters encryption key serial number synchronization counter sequential ? ? ? exit learn successful store: learn unsuccessful no no no yes yes yes
2011 microchip technology inc. ds41111e-page 19 HCS370 7.2 decoder operation figure 7-2 summarizes normal decoder operation. the decoder waits until a transmission is received. the received serial number is compared to the eeprom table of learned transmitters to first determine if this transmitter's use is allowed in the system. if from a learned transmitter, the transmission is decrypted using the stored crypt key and authenticated via the discrimination bits for appropriate crypt key usage. if the decryption was valid the synchronization value is evaluated. figure 7-2: typical decoder operation 7.3 synchronization with decoder (evaluating the counter) the k ee l oq technology patent scope includes a sophisticated synchronization technique that does not require the calculation and st orage of future codes. the technique securely blocks invalid transmissions while providing transparent resynchronization to transmitters inadvertently activated aw ay from the receiver. figure 7-3 shows a 3-partition, rotating synchronization window. the size of each window is optional but the technique is fundamental. each time a transmission is authenticated, the intended function is executed and the transmission's synchroni zation counter value is stored in eeprom. from t he currently stored counter value there is an initial "single operation" forward win- dow of 16 codes. if the difference between a received synchronization counter and the last stored counter is within 16, the intended function will be executed on the single button press and the new synchronization coun- ter will be stored. storing the new synchronization counter value effectively rotates the entire synchroniza- tion window. a "double operation" (resynchronization) window fur- ther exists from the ?single operation? window up to 32k codes forward of the currently stored counter value. it is referred to as "double operation" because a transmission with synchroniza tion counter value in this window will require an additional, sequential counter transmission prior to executing the intended function. upon receiving the sequential transmission the decoder executes the intend ed function and stores the synchronization counter valu e. this resynchronization occurs transparently to the user as it is human nature to press the button a second ti me if the first was unsuc- cessful. the third window is a "blocked window" ranging from the double operation window to the currently stored synchronization counter value. any transmission with synchronization counter value within this window will be ignored. this window excludes previously used, perhaps code grabbed transmissions from accessing the system. ? transmission received does serial number match ? decrypt transmission is decryption valid ? is counter within 16 ? is counter within 32k ? update counter execute command save counter in temp location start no no no no yes yes yes yes yes no and no note: the synchronization method described in this section is only a typical implementation and because it is usually implemented in firmware, it can be altered to fit the needs of a particular system.
HCS370 ds41111e-page 20 2011 microchip technology inc. figure 7-3: synchronization window 7.4 security considerations the strength of this security is based on keeping a secret inside the transmitter that can be verified by encrypted transmissions to a trained receiver. the transmitter's secret is the manufacturer's key, not the encryption algorithm. if that key is compromised then a smart transceiver can captur e any serial number, cre- ate a valid code word, and trick all receivers trained with that serial number. the key cannot be read from the eeprom without costly die probing but it can be calculated by brute force de cryption attacks on trans- mitted code words. the cost for these attacks should exceed what you would want to protect. to protect the security of other receivers with the same manufacturer's code, you need to use the random seed for secure learn. it is a second secret that is unique for each transmitter. its transmission on a special button press combination can be disabled if the receiver has another way to find it, or limited to the first 127 trans- missions for the receiver to learn it. this way, it is very unlikely to ever be captur ed. now if a manufacturer's key is compromised, clone transmitters can be created, but without the unique seed they have to be relearned by the receiver. in the same way if the transmissions are decrypted by brute force on a computer, the ran- dom seed hides the manufacturer's key and prevents more than one transmitter from being compromised. the length of the code word at these baud rates makes brute force attacks that gue ss the hopping code take years. to make the receiver less susceptible to this attack, make sure that you test all the bits in the decrypted code for the correct value. do not just test low counter bits for sync and the bit for the button input of interest. the main benefit of hopping codes is to prevent the retransmission of captured code words. this works very well for code words that the receiver decodes. its weakness is if a code is captured when the receiver misses it, the code may trick the receiver once if it is used before the next valid transmission. to make the receiver more secure it could increment the counter on questionable code word receptions. to make the trans- mitter more secure, it could use separate buttons for lock and unlock functions. another way would be to require two different buttons in sequence to gain access. there are more ways to make k ee l oq systems more secure, but they all have trade offs. you need to find a balance between security, design effort, and usability, particularly in failure modes. for example, if a button sticks or kids play with it, the counter should not end up in the blocked code window rendering the transmitter useless or requiring retraining. blocked entire window rotates to eliminate use of previously used codes single operation window window (32k codes) (16 codes) double operation (resynchronization) window (32k codes) stored synchronization counter value
2011 microchip technology inc. ds41111e-page 21 HCS370 8.0 development support the pic ? microcontrollers and dspic ? digital signal controllers are supported with a full range of software and hardware development tools: ? integrated development environment - mplab ? ide software ? compilers/assemblers/linkers - mplab c compiler for various device families - hi-tech c for various device families - mpasm tm assembler -mplink tm object linker/ mplib tm object librarian - mplab assembler/link er/librarian for various device families ? simulators - mplab sim software simulator ? emulators - mplab real ice? in-circuit emulator ? in-circuit debuggers - mplab icd 3 - pickit? 3 debug express ? device programmers - pickit? 2 programmer - mplab pm3 device programmer ? low-cost demonstratio n/development boards, evaluation kits, and starter kits 8.1 mplab integrated development environment software the mplab ide software brings an ease of software development previously unseen in the 8/16/32-bit microcontroller market. the mplab ide is a windows ? operating system-based app lication that contains: ? a single graphical interface to all debugging tools - simulator - programmer (sold separately) - in-circuit emulator (sold separately) - in-circuit debugger (sold separately) ? a full-featured editor with color-coded context ? a multiple project manager ? customizable data windows with direct edit of contents ? high-level source code debugging ? mouse over variable inspection ? drag and drop variables from source to watch windows ? extensive on-line help ? integration of select thir d party tools, such as iar c compilers the mplab ide allows you to: ? edit your source files (either c or assembly) ? one-touch compile or assemble, and download to emulator and simulator tools (automatically updates all project information) ? debug using: - source files (c or assembly) - mixed c and assembly - machine code mplab ide supports multiple debugging tools in a single development paradigm, from the cost-effective simulators, through low-cost in-circuit debuggers, to full-featured emulators. this eliminates the learning curve when upgrading to tools with increased flexibility and power.
HCS370 ds41111e-page 22 2011 microchip technology inc. 8.2 mplab c compilers for various device families the mplab c compiler code development systems are complete ansi c compilers for microchip?s pic18, pic24 and pic32 families of microcontrollers and the dspic30 and dspic33 families of digital signal control- lers. these compilers provide powerful integration capabilities, superior code optimization and ease of use. for easy source level debugging, the compilers provide symbol information that is optimized to the mplab ide debugger. 8.3 hi-tech c for various device families the hi-tech c compiler code development systems are complete ansi c comp ilers for microchip?s pic family of microcontrollers and the dspic family of digital signal controllers. these compilers provide powerful integration capabilities, omniscient code generation and ease of use. for easy source level debugging, the compilers provide symbol information that is optimized to the mplab ide debugger. the compilers include a macro assembler, linker, pre- processor, and one-step driver, and can run on multiple platforms. 8.4 mpasm assembler the mpasm assembler is a full-featured, universal macro assembler for pic10/12/16/18 mcus. the mpasm assembler generates relocatable object files for the mplink object linker, intel ? standard hex files, map files to detail memory usage and symbol reference, absolute lst files that contain source lines and generated machine code and coff files for debugging. the mpasm assembler features include: ? integration into mplab ide projects ? user-defined macros to streamline assembly code ? conditional assembly for multi-purpose source files ? directives that allow complete control over the assembly process 8.5 mplink object linker/ mplib object librarian the mplink object linker combines relocatable objects created by the mpasm assembler and the mplab c18 c compiler. it can link relocatable objects from precompiled libraries, using directives from a linker script. the mplib object librarian manages the creation and modification of library files of precompiled code. when a routine from a library is called from a source file, only the modules that contain that routine will be linked in with the application. this allows large libraries to be used efficiently in many different applications. the object linker/libra ry features include: ? efficient linking of single libraries instead of many smaller files ? enhanced code maintainability by grouping related modules together ? flexible creation of libraries with easy module listing, replacement, deletion and extraction 8.6 mplab assembler, linker and librarian for various device families mplab assembler produces relocatable machine code from symbolic assembly language for pic24, pic32 and dspic devices. mplab c compiler uses the assembler to produce its object file. the assembler generates relocatable objec t files that can then be archived or linked with other relocatable object files and archives to create an execut able file. notable features of the assembler include: ? support for the entire device instruction set ? support for fixed-point and floating-point data ? command line interface ? rich directive set ? flexible macro language ? mplab ide compatibility
2011 microchip technology inc. ds41111e-page 23 HCS370 8.7 mplab sim software simulator the mplab sim software simulator allows code development in a pc-hosted environment by simulat- ing the pic ? mcus and dspic ? dscs on an instruction level. on any given instruction, the data areas can be examined or modified and stimuli can be applied from a comprehensive stimulus c ontroller. registers can be logged to files for further run-time analysis. the trace buffer and logic analyzer display extend the power of the simulator to record and track program execution, actions on i/o, most peripherals and internal registers. the mplab sim software simulator fully supports symbolic debugging using the mplab c compilers, and the mpasm and mplab assemblers. the soft- ware simulator offers the flexibility to develop and debug code outside of the hardware laboratory envi- ronment, making it an excellent, economical software development tool. 8.8 mplab real ice in-circuit emulator system mplab real ice in-circuit emulator system is microchip?s next generation high-speed emulator for microchip flash dsc and mcu devices. it debugs and programs pic ? flash mcus and dspic ? flash dscs with the easy-to-use, powerful graphical user interface of the mplab integrated devel opment environment (ide), included with each kit. the emulator is connected to the design engineer?s pc using a high-speed usb 2.0 interface and is connected to the target with either a connector compatible with in- circuit debugger systems (rj11) or with the new high- speed, noise tolerant, low-voltage differential signal (lvds) interconnection (cat5). the emulator is field upgradable through future firmware downloads in mplab ide. in upcoming releases of mplab ide, new devices will be supported, and new features will be added. mplab real ice offers significant advantages over competitive emulators including low-cost, full-speed emulation, run-time variable watches, trace analysis, complex breakpoints, a ruggedized probe interface and long (up to three meters) interconnection cables. 8.9 mplab icd 3 in-circuit debugger system mplab icd 3 in-circuit debugger system is micro- chip's most cost effective high-speed hardware debugger/programmer for microchip flash digital sig- nal controller (dsc) and microcontroller (mcu) devices. it debugs and programs pic ? flash microcon- trollers and dspic ? dscs with the powerful, yet easy- to-use graphical user interface of mplab integrated development environment (ide). the mplab icd 3 in-circuit debugger probe is con- nected to the design engineer's pc using a high-speed usb 2.0 interface and is connected to the target with a connector compatible with the mplab icd 2 or mplab real ice systems (rj-11). mplab icd 3 supports all mplab icd 2 headers. 8.10 pickit 3 in-circuit debugger/ programmer and pickit 3 debug express the mplab pickit 3 allows debugging and program- ming of pic ? and dspic ? flash microcontrollers at a most affordable price point using the powerful graphical user interface of the mp lab integrated development environment (ide). the mplab pickit 3 is connected to the design engineer's pc using a full speed usb interface and can be connec ted to the target via an microchip debug (rj-11) connector (compatible with mplab icd 3 and mplab real ice). the connector uses two device i/o pins and the reset line to imple- ment in-circuit debugging and in-circuit serial pro- gramming?. the pickit 3 debug express include the pickit 3, demo board and microcontroller, hookup cables and cdrom with user?s guide, lessons, tutorial, compiler and mplab ide software.
HCS370 ds41111e-page 24 2011 microchip technology inc. 8.11 pickit 2 development programmer/debugger and pickit 2 debug express the pickit? 2 development programmer/debugger is a low-cost development tool with an easy to use inter- face for programming and debugging microchip?s flash families of microcontrollers. the full featured windows ? programming interface supports baseline (pic10f, pic12f5xx, pic16f5xx), midrange (pic12f6xx, pic16f), pic18f, pic24, dspic30, dspic33, and pic32 families of 8-bit, 16-bit, and 32-bit microcontrollers, and many microchip serial eeprom products. with microchip?s powerful mplab integrated development environmen t (ide) the pickit? 2 enables in-circuit debugging on most pic ? microcon- trollers. in-circuit-debugging runs, halts and single steps the program while the pic microcontroller is embedded in the applicatio n. when halted at a break- point, the file registers ca n be examined and modified. the pickit 2 debug express include the pickit 2, demo board and microcontroller, hookup cables and cdrom with user?s guide, lessons, tutorial, compiler and mplab ide software. 8.12 mplab pm3 device programmer the mplab pm3 device programmer is a universal, ce compliant device programmer with programmable voltage verification at v ddmin and v ddmax for maximum reliability. it features a large lcd display (128 x 64) for menus and error messages and a modu- lar, detachable socket asse mbly to support various package types. the icsp? ca ble assembly is included as a standard item. in stand-alone mode, the mplab pm3 device programmer can read, verify and program pic devices without a pc co nnection. it can also set code protection in this mode. the mplab pm3 connects to the host pc via an rs-232 or usb cable. the mplab pm3 has high-speed communications and optimized algorithms for quick programming of large memory devices and incorpor ates an mmc card for file storage and data applications. 8.13 demonstration/development boards, evaluation kits, and starter kits a wide variety of demonstr ation, development and evaluation boards for various pic mcus and dspic dscs allows quick application development on fully func- tional systems. most boards include prototyping areas for adding custom circuitry and provide application firmware and source code for examination and modification. the boards support a variety of features, including leds, temperature sensors, sw itches, speakers, rs-232 interfaces, lcd displays, potentiometers and additional eeprom memory. the demonstration and development boards can be used in teaching environments, for prototyping custom circuits and for learning about various microcontroller applications. in addition to the picdem? and dspicdem? demon- stration/development board series of circuits, microchip has a line of evaluation kits and demonstration software for analog filter design, k ee l oq ? security ics, can, irda ? , powersmart battery management, seeval ? evaluation system, sigma-delta adc, flow rate sensing, plus many more. also available are starter kits that contain everything needed to experience the specified device. this usually includes a single application and debug capability, all on one board. check the microchip web page (www.microchip.com) for the complete list of demonstration, development and evaluation kits.
2011 microchip technology inc. ds41111e-page 25 HCS370 9.0 electrical characteristics 9.1 maximum ratings* ambient temperature under bias................................................................................................. ............ -40c to +125c storage temperature ............................................................................................................ .................. -65c to +150c voltage on v dd w/respect to v ss ................................................................................................................ -0.3 to +7.5v voltage on led w/respect to v ss ..................................................................................................................-0.3 to +11v voltage on all other pins w/respect to v ss ........................................................................................-0.3v to v dd + 0.3v total power dissipation (note 1) ..........................................................................................................................500 m w maximum current out of v ss pin ........................................................................................................................... 100 ma maximum current into v dd pin ........................................................................................................................... ...100 ma input clamp current, i ik (v i < 0 or v i > v dd ) ......................................................................................................... 20 ma output clamp current, i ok (vo < 0 or vo >v dd ).................................................................................................... 20 ma maximum output current sunk by any output pin.................................................................................. ..................25 ma maximum output current sourced by any output pin ............................................................................... ...............25 ma *notice: stresses above those listed under ?maximum ratings? ma y cause permanent damage to the device. this is a stress rating only and functional operation of the device at th ose or any other conditions above those indicated in the operational listings of this specification is not implied. ex posure to maximum rating conditions for extended periods may affect device reliability. note 1: power dissipation is calculated as follows: pdis=v dd x {i dd - a i oh } + a {(v dd -v oh ) x i oh } + a(v o l x i ol ).
HCS370 ds41111e-page 26 2011 microchip technology inc. table 9-1: dc characteristics: HCS370 dc characteristics all pins except power supply pins standard operating conditions (unless otherwise stated) operating temperature 0 c t a +70 c (commercial) -40 c t a +85 c (industrial) param no. sym. characteristic min. typ.? max. units conditions d001 v dd supply voltage 2.05 (4) ?5.5 v d003 v por v dd start voltage to ensure internal power-on reset signal ?v ss ? v cold reset d004 sv dd v dd rise rate to ensure internal power-on reset signal 0.05 * ??v/ms d005 v bor brown-out reset voltage ? 1.9 2 v d010 i dd supply current (2) ?1.05 maf osc = 4 mhz, v dd = 5.5v (3) d010b 2.0 ma f osc = 4 mhz, v dd = 3.5v (3) d021a i pd shutdown current ? 0.1 1.0 av dd = 5.5v input low voltage v il input pins d030 with ttl buffer v ss ? 0.8 v 4.5v v dd 5.5v d030a v ss ? 0.15 v dd v otherwise d031 with schmitt trigger buffer v ss ? 0.2 v dd v d032 shift v ss ? 0.2 v dd v input high voltage v ih input pins ? d040 d040a with ttl buffer 2.0 (0.25 v dd +0.8) ? ? v dd v dd v v 4.5v v dd 5.5v otherwise d041 with schmitt trigger buffer 0.8 v dd ?v dd v d042 shift 0.8 v dd ?v dd v input threshold voltage d050 v th shift 0.4 ? 1.2 v 2.05 v dd 3.5v d051 v th sleep/s5 0.3 0.6 0.9 v 2.05 v dd 3.5v d052 v in v in 1.05 1.19 1.33 v data internally inverted d053 vtol vlow detect tolerance ? ? ? ? + 200 + 350 mv mv setting 5 = 2.25v setting 25 = 4.25v input leakage current d060 i il input pins ? ? 1 av ss v pin v dd , pin at hi- impedance, no pull-downs enabled d061 shift ? ? 5 av ss v pin v dd
2011 microchip technology inc. ds41111e-page 27 HCS370 output low voltage d080 v ol output pins ? ? 0.6 v i ol = 8.5 ma, v dd = 4.5v output high voltage d090 v oh output pins v dd -0.7 ? ? v i oh = -3.0 ma, v dd = 4.5v d091 v oh led 1.5 ? ? v i oh = -0.5 ma, v dd = 4.5v internal pull-down resistance d100 rpd s0 - s5, shift 40 75 100 kohms if enabled data eeprom memory d120 e d endurance 200k 1000k ? e/w 25 c at 5v d121 vdrw v dd for read/write 2.05 ? 5.5 v d122 tdew erase/write cycle time (1) ?410ms note 1: * these parameters are characterized but not tested. 2: ? "typ" column data is at 5.0v, 25c unless otherwise stat ed. these parameters are for design guidance only and are not tested. 3: the supply current is mainly a function of the operating voltage and frequency. other factors such as i/o pin loading and switching rate, oscillator type, inter nal code execution pattern, and temperature also have an impact on the current consumption. 4: should operate down to v bor but not tested below 2.0v. the test conditions for all i dd measurements in active operation mode ar e: all i/o pins tristated, pulled to v dd . mclr = v dd ; wdt enabled/disabled as specified. the power-dow n/shutdown current in sleep mode does not depend on the oscillator frequency. power - down current is measured with the part in sleep mode, with all i/o pins in hi-imp edance state and tied to v dd or v ss . the current is the additional current consumed when the wdt is e nabled. this current should be added to the base i dd or i pd measurement. table 9-1: dc characteristics: HCS370 (continued) dc characteristics all pins except power supply pins standard operating conditions (unless otherwise stated) operating temperature 0 c t a +70 c (commercial) -40 c t a +85 c (industrial) param no. sym. characteristic min. typ.? max. units conditions
HCS370 ds41111e-page 28 2011 microchip technology inc. table 9-2: ac characteristics commercial (c): t amb = 0 c to +70 c industrial (i): t amb = -40 c to +85 c 2.05v < v dd < 5.5 parameter sym. min. typ. (1) max. unit conditions timing element t e 90 ? 880 s bsel = 00 2 (min) or bsel = 01 2 bsel = 10 2 bsel = 11 2 (max) power-up time t pu ?25?ms pll set-up time t pll 10 ? 15 ? 30 285 ms ms wait = 0 wait = 1 led on time t ledon 45 ? 110 ms ledos = 0 (min) or ledos = 1 (max) led off time t ledoff 450 500 550 ms guard time t g 1.8 5.6 46.1 96.1 2t e 6.4 51.2 102.4 112.6 7.0 56.3 42.6 ms ms ms ms gsel = 00 2 (min) gsel = 01 2 gsel = 10 2 gsel = 11 2 (max) note 1: all timing values are subject to the oscillator variance. these parameters are characterized but not tested.
2011 microchip technology inc. ds41111e-page 29 HCS370 10.0 packaging information 10.1 package marking information xxxxxxxxxxxxxx xxxxxxxxxxxxxx yywwnnn 14-lead pdip example 14-lead soic xxxxxxxxxx yywwnnn 14-lead tssop xxxxxx example example HCS370 xxxxxxxxxxxxxx 9904nnn yyww nnn HCS370 9904 nnn legend: xx...x customer specific information* yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code note : in the event the full microchip part nu mber cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer spec ific information. * standard marking consists of micr ochip part number, year code, we ek code, facility code, mask rev#, and assembly code. for marking beyond this, ce rtain price adders apply. please check with your microchip sales office. for sqtp devices, any spec ial marking adders are included in sqtp price. xxxxxxxxxx HCS370 9904nnn xxxxxxxxxx
HCS370 ds41111e-page 30 2011 microchip technology inc. 10.2 package details n e1 d note 1 12 3 e c eb a2 l a a1 b1 be
2011 microchip technology inc. ds41111e-page 31 HCS370 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
HCS370 ds41111e-page 32 2011 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
2011 microchip technology inc. ds41111e-page 33 HCS370
HCS370 ds41111e-page 34 2011 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
2011 microchip technology inc. ds41111e-page 35 HCS370 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
HCS370 ds41111e-page 36 2011 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
2011 microchip technology inc. ds41111e-page 37 HCS370 appendix a: additional information microchip?s secure data products are covered by some or all of the following: code hopping encoder patents issued in european countries and u.s.a. secure learning patents issued in european countries, u.s.a. and r.s.a. revision history revision e (june 2011) ? updated the following sections: development sup- port, the microchip web site, reader response and HCS370 product id entification system ? added new section appendix a ? minor formatting and text changes were incorporated throughout the document
HCS370 ds41111e-page 38 2011 microchip technology inc. the microchip web site microchip provides online support via our www site at www.microchip.com. this web site is used as a means to make files and information easily available to customers. accessible by using your favorite internet browser, the web site contains the following information: ? product support ? data sheets and errata, application notes and sample programs, design resources, user?s guides and hardware support documents, latest software releases and archived software ? general technical support ? frequently asked questions (faq), technical support requests, online discussion groups, microchip consultant program member listing ? business of microchip ? product selector and ordering guides, latest microchip press releases, listing of seminars and events, listings of microchip sales offices, distributors and factory representatives customer change notification service microchip?s customer notification service helps keep customers current on microchip products. subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or de velopment tool of interest. to register, access the microchip web site at www.microchip.com. under ?support?, click on ?customer change notification? and follow the registration instructions. customer support users of microchip products can receive assistance through several channels: ? distributor or representative ? local sales office ? field application engineer (fae) ? technical support ? development systems information line customers should contact their distributor, representative or field application engineer (fae) for support. local sales offices are also available to help customers. a listing of sa les offices and locations is included in the back of this document. technical support is available through the web site at: http://micro chip.com/support
2011 microchip technology inc. ds41111e-page 39 HCS370 reader response it is our intention to provide you with the best documentation possible to ensure successful use of your microchip product. if you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please fax your comments to the technical publications manager at (480) 792-4150. please list the following information, and use this outli ne to provide us with your comments about this document. to: technical publications manager re: reader response total pages sent ________ from: name company address city / state / zip / country telephone: (_______) _________ - _________ application (optional): would you like a reply? y n device: literature number: questions: fax: (______) _________ - _________ ds41111e HCS370 1. what are the best features of this document? 2. how does this document meet your hardware and software development needs? 3. do you find the organization of this document easy to follow? if not, why? 4. what additions to the document do you th ink would enhance the structure and subject? 5. what deletions from the document could be made without affecting the overall usefulness? 6. is there any incorrect or misl eading information (what and where)? 7. how would you improve this document?
HCS370 ds41111e-page 40 2011 microchip technology inc. HCS370 product iden tification system . to order or obtain information, e.g., on pricing or deli very, refer to the factory or the listed sales office. * jw devices are uv erasable and can be programmed to any device configuration. jw devices meet the electrical requirement of each oscillator type. part no. x /xx xxx pattern package temperature range device device HCS370: code hopping encoder HCS370t: code hopping encoder (tape and reel - sl only) temperature range - = 0c to +70c i = -40c to +85c package p = plastice dip (300 mil body), 14-lead sl = plastic soic (150 mil body), 14-lead st = plastic tssop (4.4mm body), 14-lead pattern
? 2011 microchip technology inc. ds41111e-page 41 information contained in this publication regarding device applications and the like is prov ided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application me ets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safe ty applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting fr om such use. no licenses are conveyed, implicitly or ot herwise, under any microchip intellectual property rights. trademarks the microchip name and logo, th e microchip logo, dspic, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, pic 32 logo, rfpic and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. filterlab, hampshire, hi-tech c, linear active thermistor, mxdev, mxlab, seeval and the embedded control solutions company are register ed trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, a pplication maestro, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, hi-tide, in-circuit serial programming, icsp, mindi, miwi, mpasm, mplab certified logo, mplib, mplink, mtouch, omniscient code generation, picc, picc-18, picdem, picdem.net, pickit, pictail, real ice, rflab, select mode, total endurance, tsharc, uniwindriver, wiperlock and zena are trademarks of microchip te chnology incorporated in the u.s.a. and other countries. sqtp is a service mark of mi crochip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2011, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. isbn: 978-1-61341-233-6 note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal meth ods used to breach the code protection fe ature. all of these methods, to our knowledge, require using the microchip pr oducts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are committed to continuously improving the code protection features of our products. attempts to break microchip?s c ode protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your softwa re or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperi pherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified.
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